Google · 2 days ago
Design Verification Engineering Lead
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Responsibilities
Plan the verification of complex Core IP’s in Multimedia, Security and AI Accelerator blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using System Verilog and UVM.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and show progress towards tape-out.
Qualification
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Required
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
Preferred
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience in low-power design verification.
Experience with multimedia IPs such as display or video codec, accelerator IPs.
Experience with SOC integration and sub-system verification.
Experience in verification of CPU based designs and sub-systems.
Knowledge of Verification methodologies and formal verification.
Company
Google is a multinational corporation that specializes in Internet-related services and products. It is a sub-organization of Alphabet.
H1B Sponsorship
Google has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Trends of Total Sponsorships
2023 (7870)
2022 (11232)
2021 (10397)
2020 (8609)
Funding
Current Stage
Public CompanyTotal Funding
$26.1MKey Investors
Andy Bechtolsheim
2004-08-19IPO· nasdaq:GOOG
1999-06-07Series A· $25M
1998-11-01Angel· $1M
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