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Company

Original Job Post

Actalent · 2 days ago

FPGA Design Verification Engineer

Wayne, NJ

Full-time

Onsite

Entry, Mid Level

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Responsibilities

Coverage and Verification plan documents describing verification flows and constructs, functionality to be verified, and test bench usage

Work Breakdown Structure (WBS), Gantt charts and/or other forms of a plan showing task breakdown, duration estimates, hand-ins, milestones, and task assignments;

SV/UVM Testbench infrastructure – environment, UVCs, monitors, predictors, checkers, coverage collectors – required for verifying the VHDL implementing FPGA functionality.

SV/UVM testcases for configuring the testbench and for generating the stimulus needed to verify the VHDL implements the functionality described in the FPGA specification.

Associated scripts and flows necessary for verification and simulation

Issue tracking to ensure all issues uncovered are resolved satisfactorily.

Revision / release control of all design verification source code and documentation produced as described in items 3.1.1 thru 3.1.4, above

Code and functional coverage reporting

Qualification

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Verification Plan DocumentsWork Breakdown StructureGantt ChartsSV/UVM Testbench InfrastructureSV/UVM TestcasesScriptsIssue TrackingRevision ControlCode Coverage ReportingFunctional Coverage Reporting

Required

Coverage and Verification plan documents describing verification flows and constructs, functionality to be verified, and test bench usage

Work Breakdown Structure (WBS), Gantt charts and/or other forms of a plan showing task breakdown, duration estimates, hand-ins, milestones, and task assignments

SV/UVM Testbench infrastructure – environment, UVCs, monitors, predictors, checkers, coverage collectors – required for verifying the VHDL implementing FPGA functionality

SV/UVM testcases for configuring the testbench and for generating the stimulus needed to verify the VHDL implements the functionality described in the FPGA specification

Associated scripts and flows necessary for verification and simulation

Issue tracking to ensure all issues uncovered are resolved satisfactorily

Revision / release control of all design verification source code and documentation produced as described in items 3.1.1 thru 3.1.4, above

Code and functional coverage reporting

Company

Actalent

Glassdoor

3.7

Actalent is an engineering and sciences service company.

Founded in 1983

Hanover, Maryland, USA

5,001-10,000 employees

https://www.actalentservices.com

H1B Sponsorship

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