Wise Equation Solutions Inc. · 7 hours ago
Physical Design Engineer
United States
Contract
Remote
Senior Level, Lead/Staff
10+ years exp
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Hiring Manager
Amitabh KUMAR (Jha) - LI.O.N🦁
Insider Connection @Wise Equation Solutions Inc.
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Responsibilities
Experience: 10yrs+
Synopsys Fusion Compiler/ICC2 (Synthesis, DFT insertion, Place & Route, Chip Finishing, PT-SI STA, Timing Closure, PV (DRC/ERC/PERC/LVS)
Synopsys DC, DCG, DC TOPO
Synopsys Flow Development & SOC implementation methodologies that will be deployed and used by our Synopsys customer Physical Design Implementation team members
Familiar with Synopsys Lynx a plus
RTL Hand-over experience a plus for RTL to GDS
Experience with top-level floorplanning, bump-maps, RDL IO Pad/Ring creation/verification, power grid creation/verification, hierarchal floorplanning/partitioning
Solid experience with full SOC clocking methodologies (H-Tree, Structure Clocking, MS CTS for Top/Blocks with push/down & bottoms up approaches)
Highly proficient with SDC STA constraints development driving back-end tools for blocks and full-chip through timing closure & sign-off
Ability to define sign-off requirements/margins based on Foundry technology requirements a plus
DFT experience with compression, scan, TDF, and MEMBIST a plus
Synopsys Formality for formal verification (RTL to Gate, Gate-to-Gate) & Formality ECO flows
Familiar with UPF flows & methodologies for multi-voltage power domains with turn on/turn off using UPF
Synopsys ICV for PV (Physical Verification – DRC/ERC/LVS/PERC)
Ansys Redhawk SC (For IR analysis for static, dynamic, & EMIR )
Experience in PD implementation/design closure on complex IP Sub-Systems such as PCIe, USB, MIPI, DDR, & HBM a plus
Experience with GlobalFoundries, TSMC, & Samsung technology nodes are a plus
Consultants should have a solid track record on execution delivering to high-quality standards for delivering to high quality tape-out
Qualification
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Required
Experience: 10yrs+
Synopsys Fusion Compiler/ICC2 (Synthesis, DFT insertion, Place & Route, Chip Finishing, PT-SI STA, Timing Closure, PV (DRC/ERC/PERC/LVS)
Synopsys DC, DCG, DC TOPO
Synopsys Flow Development & SOC implementation methodologies that will be deployed and used by our Synopsys customer Physical Design Implementation team members
Solid experience with full SOC clocking methodologies (H-Tree, Structure Clocking, MS CTS for Top/Blocks with push/down & bottoms up approaches)
Highly proficient with SDC STA constraints development driving back-end tools for blocks and full-chip through timing closure & sign-off
Ability to define sign-off requirements/margins based on Foundry technology requirements
Synopsys Formality for formal verification (RTL to Gate, Gate-to-Gate) & Formality ECO flows
Synopsys ICV for PV (Physical Verification – DRC/ERC/LVS/PERC)
Ansys Redhawk SC (For IR analysis for static, dynamic, & EMIR)
Consultants should have a solid track record on execution delivering to high-quality standards for delivering to high quality tape-out
Preferred
Familiar with Synopsys Lynx
RTL Hand-over experience a plus for RTL to GDS
Experience with top-level floorplanning, bump-maps, RDL IO Pad/Ring creation/verification, power grid creation/verification, hierarchal floorplanning/partitioning
DFT experience with compression, scan, TDF, and MEMBIST a plus
Familiar with UPF flows & methodologies for multi-voltage power domains with turn on/turn off using UPF
Experience in PD implementation/design closure on complex IP Sub-Systems such as PCIe, USB, MIPI, DDR, & HBM a plus
Experience with GlobalFoundries, TSMC, & Samsung technology nodes are a plus
Company
Wise Equation Solutions Inc.
Wise Equation Solutions is one of the fastest growing Veteran – Owned enterprise in IT consulting and business services for small, mid and large organizations.
51-200 employees
H1B Sponsorship
Wise Equation Solutions Inc. has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2023 (37)
2022 (34)
2021 (45)
2020 (53)
Funding
Current Stage
Growth StageCompany data provided by crunchbase
