PseudolithIC · 2 days ago
RFIC Layout Engineer
Maximize your interview chances
HardwareSemiconductor
No H1BU.S. Citizen Only
Insider Connection @PseudolithIC
Get 3x more responses when you reach out via email instead of LinkedIn.
Responsibilities
Responsible for layout-related design tasks and foundry tapeout preparation in PseudolithIC's heterogeneous integration platform based on a combination of silicon and compound semiconductor devices.
Work collaboratively within the Design Group to develop high-performance RFIC circuits.
Generate a layout of an integrated circuit block based on initial inputs from the RFIC Design Engineer.
Prepare submission of reticles in silicon and compound semiconductor processes and handle sign-off of tapeouts.
Develop custom SKILL scripts or modifications of DRC or LVS.
Work closely with the manufacturing team and other stakeholders.
Qualification
Find out how your skills align with this job's requirements. If anything seems off, you can easily click on the tags to select or unselect skills to reflect your actual expertise.
Required
Proficiency with Cadence Virtuoso EDA environment
Physical verification for silicon and compound semiconductor technologies including DRC and LVS using Cadence and/or Calibre tools
Excellent communication skills and detail-oriented focus
3+ years of industry experience
This position must meet Export Control compliance requirements, therefore a 'U.S. Person' as defined by 22 C.F.R. § 120.15 is required. 'U.S. Person' includes U.S. Citizen, lawful permanent resident, refugee, or asylee.
Preferred
Experience with MMIC layout and Keysight ADS is desirable
Scripting for EDA is preferred (Skill, Perl, Python)
HS Diploma/GED or BS in electrical engineering or related background preferred
Benefits
Health benefits
401K