Silicon Verification Engineer 1 @ Protingent | Jobright.ai
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Silicon Verification Engineer 1 jobs in Mountain View, CA
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Protingent · 15 hours ago

Silicon Verification Engineer 1

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Responsibilities

Define, document, and implement a UVM verification environment including agents and scoreboards
Write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral
Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes
Support post-silicon verification activities of the products working with design and product teams
Purpose of the Team: The purpose of this team is IP verification to verify the design of high-speed interface connecting different parts of an SOC chip.
Key projects: This role will contribute to building and enhancing verification test benches and components, designing tests, coding core boards and insertions, writing UVM tests, and providing functional coverage.
Typical task breakdown and operating rhythm: The role will consist of meetings every day in the mornings with the internal verification team and design team, which will go over agenda items like DevOps tasks and important actions. The remainder of their time is spent heads down focusing on assigned tasks.

Qualification

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SystemVerilogUVMVerilogPythonRubyC++Functional CoveragePre-silicon VerificationPost-silicon VerificationAutomated Test BenchesVMMOVMMixed Signal Exposure

Required

3 years’ experience with SystemVerilog and UVM
2 years’ experience with coding functional coverage (based off of SystemVerilog)
2 years’ experience with scripting in either Python, Ruby, or C++
1 years’ experience of exposure to formal methodology
Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related degree required
0-2 years of relevant experience required
1-3 overall years of experience in the field
Proficient in using Verilog and VMM/OVM/UVM
Experience in pre and post silicon verification test flow and automated test benches
Effective communication, collaboration, and teamwork skills

Preferred

Previous experience with mixed signal exposure (analog and digital)
Fluent with SystemVerilog and UVM having significant design verification experience

Benefits

Insurance plan options (HDHP plan or POS plan)
Education/certification reimbursement
Pre-tax commuter benefits
Paid Time Off (PTO)
An administered 401k plan

Company

Protingent

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Protingent delivers the top-tier technical and IT professionals you need to power your business forward.

H1B Sponsorship

Protingent has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2022 (1)

Funding

Current Stage
Growth Stage
Company data provided by crunchbase
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