Groq · 2 days ago
SLT Test Engineer (Software/Hardware)
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Artificial Intelligence (AI)Electronics
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Responsibilities
Own design and validation of System Level Test from software perspective.
Write code to help communicate SLT handler to test controller and to peripherals like temperature control units
Write test methods, scripts and code to create a test Flow encompassing all the key system level tests provided by the systems validation team
Automate and integrate SLT tests to create a master Test flow for the SLT testing on the handler
Develop custom tests on the system level to create the most effective screen tests for SLT
Define HVM (High Volume Manufacturing) test requirements, collaborate closely with System architecture, chip design, and System validation teams to help create production ready SLT flows
Collaborate with chip design and system validation teams to develop a test plan for System to Tester correlation for optimizing power and performance
Drive SLT handler selection for a customized SLT solution
Drive SLT handler enablement by working closely with multiple vendors
Define and drive PCB designs for the SLT solution
Define and drive SLT hardware solutions for sockets, Temperature control units etc.
Drive the selection of system test requirements for NPI, HVM, platform to platform correlation, and RMAs
Work with chip test (ATE) and System Validation teams to decide how to improve the overall manufacturing test coverage
Establish network connectivity by understanding the network topology
Datalog manipulation to fit industry standards
Provide production sustaining support at OSAT for DPPM reduction, yield analysis, RMA debug, and test time reduction
Support Silicon Qual activities (HTOL/Burn In) from a system level
Qualification
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Required
MS/PhD in Electrical Engineering, Computer Science, or Computer Engineering
10+ years experience in Systems Level Test, Systems validation, and/or bench testing
Experience in day zero bring up of new silicon at the system level
Experience in driving SLT testing in HVM
Experience with testing and characterization of high power Ips like TPUs, CPUs, GPUs in mission mode
Experience with testing and characterization of High Speed SerDes based IPs (PCIe, Ethernet SerDes etc.)
Knowledge of network topology and experience in network connectivity (HW and SW)
Proficient in C#, C/C++, PERL, Python, .NET framework
Experience in Security provisioning and knowledge of Fuse programming implementation
Benefits
Equity
Benefits
Company
Groq
Groq radically simplifies compute to accelerate workloads in artificial intelligence, machine learning, and high-performance computing.
H1B Sponsorship
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Distribution of Different Job Fields Receiving Sponsorship
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Trends of Total Sponsorships
2023 (4)
2022 (6)
2021 (18)
2020 (2)
Funding
Current Stage
Late StageTotal Funding
$1BKey Investors
Social Capital
2024-08-05Series D· $640M
2024-06-20Secondary Market
2021-04-14Series C· $300M
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