Cornelis Networks · 4 hours ago
Sr. ASIC Ethernet Design Engineer
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Responsibilities
End-to-end SoC/ASIC development.
Front-end standard cell ASIC development including RTL development, Design Verification, synthesis, and post-silicon validation.
Cross-functional collaboration and partnering with internal and external cross-functional teams, across all levels of the corporation.
Define, implement, debug, and deliver system solutions around purpose-built ASICs.
Qualification
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Required
Please do not apply if you live outside of North or South America. All other countries cannot be considered.
15+ years' post-college experience with silicon development.
15+ years' post-college experience in digital design with one or more HDL language (System Verilog, Verilog, VHDL).
10+ years of relevant experience in networking hardware design, proven expertise in 50G, 100G, 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, IPSec.
5 + years' post-college experience in one or more scripting language (TCL, Python, Perl).
Understanding of Standard Cell ASIC development flow including digital design, IP integration, simulation and synthesis.
B.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
To qualify for this position, candidates must be located in the United States, legally authorized to work in the U.S. and must not need U.S. Visa sponsorship now or in the future.
Preferred
M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
Track record of first-pass success in ASIC and Systems.
Experience with multiple clock designs and asynchronous interfaces.
Company
Cornelis Networks
Cornelis Networks develops purpose-built fabrics for scientific, commercial, and government organizations.
Funding
Current Stage
Growth StageTotal Funding
$93.3MKey Investors
IAG Capital PartnersDowning Ventures
2024-03-01Series B· $25M
2023-08-11Series Unknown· $19.3M
2022-11-14Series B· $29M
Recent News
2024-11-06
2024-04-14
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